• Rev 3 to Rev 4 PCB Changes

  • Changed offset and amplitude of 10 MHz signal to ATWD Mux channel 3

  • Corning oscillator footprint

  • Configuration memory footprint

  • LVDS Clock drivers changed to different manufacturer and footprint

  • LVDS Clock line receivers changed to different manufacturer and footprint

  • LVDS Clock buffer changed to different manufacturer. Same pin-out

  • 1.8V current monitoring jumper/gain change

  • 3.3V current monitoring jumper/gain change

  • Power supply switching inductors changed

  • Power supply filter inductors changed

  • Ferrite beads changed to different manufacturer

  • Selected Ferrite Beads changed to high power type with wire strip conductor

  • 2.5V switching power supply output exchanged with 1.8V switching power supply output. (Should be transparent change). Involves a jumper and scaling resistor.

  • Current monitoring amplifiers now all depend on -5V, improving accuracy for low currents

  • DC-DC converter footprint for 7W unit fixed

  • on-board LED pulser power supply modifications

  • Sleves on leads of the big white Dearborn capacitors to reduce a shock hazard

  • LED Pulser trigger circuit changes to improve waveform

  • Protective diode at input of PMT  fADC

  • Change ATWD clock drivers to 3.3V logic-to-5V logic part

  • Change LED flasher buffer/schmitt trigger to 3.3V logic-to-5V logic part

  • Remove 47uF capacitor that delays booting

  • CPLD and Config Memory JTAG connector colors now different

  • Configuration memory footprint

  • Configuration memory download delay by mode select pin

  • PMT Input protective diodes now Do-Load

  • CPLD changed to XC2C384

  • voltage test connector no-load

  • RESET line pull-up resistor on flash memory change.  (won't boot if not loaded)

  • SDRAM memory footprint change to accommodate additional (unused) address bit

  • Relocated clock test-points near FPGA

  • Resistor changes in Local Coincidence circuit to match the impedance specified in cable procurement documents

  • Additional LC test points

  • LC transformer change

  • Arbitrary waveform pulser transformer change

  • 5V to 3.3V buffer change for LC and PMT comparator inputs (to FPGA)

  • 5V to 3.3V buffer change between ATWD and FPGA

  • FL_JTAGEN line from CPLD to flasher board connector name change

  • LED HV power supply enable bit is new.

  • Change AD9235BRU-40 to AD9215BRU-65 (fADC and Communications ADC)

  • PMT LED Current Monitor SMB Connector Footprint

  • MUX Output Resistors

  • PMT LED Current Monitor Termination resistor value change

  • ATWD Channel 2 Imput Amplifier Stage Gain change