DOR card Unable to see DSB card clock.

Status:

Open

Participants:

Azriel Goldschmidt, Gerald Przybylski

Symptoms:

- DSB clock output and 1pps output observed at DOR U24-15, and U24-11 respectively
- In 'internal mode' the DSB delivers 10 MHz, not 20 MHz as had been advertised recently...
(with a minor modification, the DSB can be jumpered to deliver 20 MHz... See changes web page)
- The sync pulse into the DOR "PPS" line is 100ns positive going, trailing the clock by ~7ns.
- The driver software supports change of clock source
- With 20 MHz clock, the stagedtests.pl script executes without error.
-- Kalle will provide an update to DOR firmware containing support for 10 MHz clock, and 'reset pulse' when time permits.
- With the DSB in Internal mode, the PPS output from the DSB lags behind the clock by about 7ns.
- The pps output of the XL-DC clock lags the rising edge of the 10 MHz output by about 10ns; The 1Hz output of the XL-DC clock lags the rising edge of the 10 MHz output by about 17ns.

Approach:

Use Oscilloscope to probe clock signals at DOR card output connectors, and at pins 11 and 15 of U24 on the Rev 0 DSB card.

Solution:

Summary:

Changing DS3 on the Rev 0 DSB to a product without internal current limiting resistor restores the tri-state buffer enable levels to a value that ensures correct functionality. (Alternately, changing R32 to ~500 produces roughly the same effect.)

Future revisions of the DSB card should derive the control voltage from a voltage divider to insure an independance from the accidental installation of an unsuitable LED for DS3.