Element to address | Reason |
PMT base control via serial port instead of analog voltage | Eliminate the sharing of the power return ground with the ground used for voltage control. Improve accuracy. |
30 MSPS ADC Replacement | Analog Devices now lists the part as obsolete |
3.3 and 2.5 V power supply redesign | New dual supply part will help reduce part count and increase reliability |
+/- 5V power supply redesign | Improve efficiency, and allow input up to 100 VDC. This cuts down on IR losses in the twisted quad |
MUX replacement in front end | Substitute lower power parts now available. |
Change ATWD footprint to one for a smaller 64 pin package | Save space and improve routability |
Update memory layouts for denser chips. | Save power and improve reliability by reducing net trace count on the board. |
Change layer stickup for digital noise reduction | Better engineering practices |
Alter FPGA pin-out to accommodate possible migration to FPGA with hard core ARM CPU integrated in same package | Reduce dependence on Cirrus Logic as a part supplier. (We live in interesting {volatile} times) |
Change PLD pin-out to enhance utilization of resources | More functionality from the chip. |
Neighbor signaling modifications | Better to accommodate next nearest neighbor local coincidence notification. |
Redesign cable front end for the impedance of the new cable | Proper use of resources |
Use new faster, lower power, minimal power transient comparators for PMT signal triggering | Good engineering |
Differential signaling of PMT triggers across a split ground | Good engineering |
Design communications front end for duplex communications | Eliminate slow recovery of saturating amplifiers in data signaling path. |
Delete the interface for analog fiber driver. | Dropped from system master plan |
Incorporate an interface for digital fiber data transmission | Possible support for IceTop |
The list above is preliminary, but fairly complete.
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