Support Documents for DOM Development

JTAG Adapter to allow the Xilinx software tools to download a DOM using the Altera ByteBlaster cable

Cascaded 2-pole Active Filter simulation.

Analog Front End notes, a powerpoint presentation under development.

DOM Main Board Testing Outline. (soon)  (A great deal of work has been done by Azriel Goldschmidt and Arthur Jones toward filling out this outline with algorithms, scripts, and computer code)

DOM Block Diagram in a Microsoft style. (PDF)

DOM Rev 2 Jumper Locations

FAQ on DOM MB Downloading.  i.e. programming the CPLD, the Flash Memory and the Configuration Memory through JTAG.

Status

Testing Overview

GPS Clock Manuals (courtesy of True-Time)

Driving Local Coincidence inputs with External Hardware